The present disclosure relates to methods of forming gates of semiconductor devices.
To reduce gate leakage current, high-k dielectrics have been used as gate insulation films of metal oxide semiconductor field effect transistors (MOSFETs) instead of using silicon oxide. However, high-k dielectrics may not be compatible with polysilicon used for gate electrodes, and a semiconductor device including a high-k dielectric may thus require use of a metal gate electrode.
To meet the requirements of using high-k dielectrics, replacement gate processes have been proposed. In a replacement gate process, gate spacers may be formed adjacent opposing sidewalls of dummy gate electrodes, and the dummy gate electrodes may subsequently be removed. A metal gate may then be formed by filling a space between the gate spacers with a metallic material.
Meanwhile, when a complementary metal oxide semiconductor (CMOS) gate is formed using a replacement gate process, a metal layer made of titanium nitride (TiN) may be formed to form a gate electrode in n-type and p-type transistor regions between gate spacers, which may be formed of an interlayer insulating film. The metal layer on the n-type transistor region may be selectively removed using a mask while allowing only portions of the metal layer on the p-type transistor to remain.
As shown in FIG. 1, in selectively removing a metal layer ML from an n-type transistor region N, a mask layer MA may formed on a p-type transistor region P as a sacrificial layer, and the metal layer ML on the n-type transistor region N may be removed by wet etching. However, even when the mask layer MA is provided, a portion of the metal layer ML on the p-type transistor region P may also be etched during the wet etching.